1. Technical Field
The present invention relates to a semiconductor memory apparatus, and in particular to a semiconductor memory apparatus which transfers cell data to bit-lines without loss.
2. Related Art
As semiconductor technology has developed, semiconductor memory apparatuses that can store a large volume of data have been created. A semiconductor memory apparatus stores one data in one cell. In order to store a large amount of data, a plurality of cells should be integrated in one semiconductor memory apparatus. Therefore, cell size is reduced as much as possible with the current the technology such that a plurality of cells can be integrated in the semiconductor memory apparatus. In the case of DRAM, in which a cell may be configured by one transistor and one capacitor, the size of the cell transistor serving as a switch is reduced as much as possible and the capacitance of the cell capacitor is also reduced.
Therefore, since the size of a data signal stored in the cell is very small, the data cannot be directly output from the cell. As a result, an operation to sense and amplify the data stored in the cell is needed. Most semiconductor memory apparatuses have a sense amplifier which senses and amplifies the data stored in the cell. Importantly, it takes a long time to sense and amplify the data. When data stored in a cell is supplied to a bit line, the sense amplifier senses and amplifies a signal difference between a bit line bar that is precharged to a predetermined voltage level and a bit line.
On the other hand, in order to reduce the power consumption of the semiconductor memory apparatus, a level of an external source voltage input to the semiconductor memory apparatus is reduced. Therefore, the level of a driving voltage for driving a sense amplifier is reduced, when causes an increase in the time for sensing and amplifying a voltage difference between a bit line to which a data signal is supplied and a precharged bit line bar by the sense amplifier.
Since the level of the external source voltage is reduced, it is difficult to transfer data stored in a unit cell to a bit line. For example, it is difficult to turn-on or turn-off a switching MOS transistor for transferring the data stored in the unit cell to the bit line, or transferring the data signal supplied to the bit line to the unit cell. The gate of the switching MOS transistor in a unit cell is coupled with a word-line. When an insufficient voltage is applied to the word-line, the MOS transistor which functions as the switch for the unit cell cannot be turned on in sufficient time.
When data reading, writing and reading operations are continuously performed, if the level of a word-line driving voltage generated from the external source voltage is temporarily lowered, the switching MOS transistor in a unit cell cannot be turned on. This means a data signal cannot be transferred to the bit line, data can not be sensed and amplified, and as a result data access fails.